This invention relates to a multi-layered substrate having a fine wiring structure used in data processing and communication systems and, more particularly, relates to a large or very large scale integration (LSI or VLSI) circuit multi-layered substrate.
An LSI multi-layered substrate allows high speed computers to be constructed with high density using gold or copper with a sufficiently low electric resistance as conductive materials. As an insulating material between wiring layers of the multi-layered substrate, polyimide group resins are used to achieve a high insulation and a low dielectric constant. For the details of the polyimide insulating layer, reference can be made to the paper by O. R. Abolafia et al entitled "MCP VIA CONFIGURATIONS" in the IBM Technical Disclosure Bulletin, Vol. 24, No. 5 (October 1981), pp. 2575-2576; the paper by D. Clocher et al entitled "CONTROLLED DIFFUSION BONDING IN MULTILEVEL PACKAGE" in IBM Technical Disclosure Bulletin, Vol. 24, No. 12 (May 1982), pp. 6364-6365; and the paper by W. B. Archey et al entitled "HIGH RELIABILITY METALLURGICAL STRUCTURE FOR MULTILEVEL SUBSTRATE WIRING" in IBM Technical Disclosure Bulletin, Vol. 24, No. 12 (May 1982), p. 6370. The polyimide insulating layers proposed by these articles have holes (hereinafter referred to as via-holes) for interconnecting conductive metallization planes separated by each insulating layer. Although these via-holes are tapered, it is practically quite difficult to shape the via-hole in taper form. Therefore, via-holes usually have vertical walls or are reverse-tapered. In the latter case, it becomes difficult to achieve a good adhesion of the thin metallic layer by sputtering on the side wall of the insulating layer in the step of forming a conductive layer on the polyimide insulating layer. A photoresist remains in the via-holes in the steps of photoresist coating, exposure, and developing. This causes difficulties in the formation of the via and an electrical cut-off between the top conductive layer and the via. Therefore, the conventional multi-layered substrates have a disadvantage in that the circuit connection is found unsatisfactory in the conductivity tests that are conducted after the substrate formation.
On the other hand, high temperature baking of about 900.degree. C. (degrees centigrade) becomes necessary when a gold paste is used for the multi-layered substrate with the result that the polyimide insulating layer is consequently deteriorated.